Lab 8 -Addressing Modes

Due Dec. 4

Goal

Review Chapter/Section 5.4 of the text. Systems usually implement wide varity of addressing modes, including:

  1. Register
  2. Register indirect
  3. Memory
  4. Memory indirect
  5. Immediate
  6. Indexed
  7. Indexed Autoincrement
  8. Stack addressing
So far our machine only has simple memory and register direct. Indirect addressing is useful for many reasons, one in particular is because it allows the easy accessing of arrays.

Using the machine from Lab 7 as a starting point, modify the micro architecure that supports memory indirect addressing mode. Below is a modified instruction set:

Instructions

Opcode Dec Mnemonic Meaning Address
0000 0 HALT Stop execution 0
0001 1 ADD add_ ACC <- ACC + mem( _add) 16
0010 2 LOAD add_ ACC <- mem( _add) 32
0011 3 STORE add_ mem( _add) <- ACC 48
0100 4 LOADI n ACC ← IR(0-7) 64
0101 5 JMP add Jump to Address add 80
0110 6 BEQ add Branch to Address if ACC = 0 96
0111 7 CLRA Clear ACC 112
1000 8 NOT ACC ← NOT(ACC) 128
1001 9 NEG ACC <- -ACC 144
1010 10 SUB add_ ACC <- mem( _add) – ACC 160
1011 11 AND add_ ACC <- ACC ^ mem(_add) 176
1100 12 NOP No operation 192
1101 13 LOADID add_ ACC <- mem(mem(_add)) 208
1110 14 STOREID add_ mem(mem(_add)) <- ACC 224
1111 15 ??? Future Expansion 240

Tasks

  1. Do any needed modifications to the micro-architecture to support the new instructions.
  2. Write and test the microcode for hte new instructions
  3. Write and test a program to increment all elements in an array.
Turn in

  1. The modified machine
  2. The microcode, with comments
  3. The program for #3 above
  4. A writing paragraph describing the major challenges of the assignment, and the how it could be made better.
Topic revision: r3 - 2012-11-27 - JimSkon
 
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