Computer Organization and Architecture

Course Description (nontraditional course is 3 credit hours instead of 4 hours in traditional program, prerequisites are also different)

CSC3053 Computer Organization and Architecture [3]. A study of computer system logic, components, hardwired and micro-programmed control units, memory organization, and RISC architecture. A digital design laboratory is included.

Prerequisites: CSC2023 Foundations of Computer Science 2, and MAT1053 Elementary Discrete Mathematics.

Topic: Digital Logic and Data Representation

• Introduction to digital logic (logic gates, flip-flops, circuits)
• Logic expressions and Boolean functions
• Representation of numeric data
• Signed and unsigned arithmetic
• Range, precision, and errors in floating-point arithmetic
• Representation of text, audio, and images
• Data compression
Learning Objectives:
1. Design a simple circuit using fundamental building blocks.
2. Appreciate the effect of AND, OR, NOT and EOR operations on binary data
3. Understand how numbers, text, images, and sound can be represented in digital form and the limitations of such representations
4. Understand how errors due to rounding effects and their propagation affect the accuracy of chained calculations.
5. Appreciate how data can be compressed to reduce storage requirements including the concepts of lossless and lossy compression.

Topic: Computer Architecture and Organization

• Overview of the history of the digital computer
• Introduction to instruction set architecture, microarchitecture and system architecture
• Processor architecture – instruction types, register sets, addressing modes
• Processor structures – memory-to-register and load/store architectures
• Instruction sequencing, flow-of-control, subroutine call and return mechanisms
• Structure of machine-level programs
• Limitations of low-level architectures
• Low-level architectural support for high-level languages

Learning Objectives:

1. Describe the progression of computers from vacuum tubes to VLSI.
2. Appreciate the concept of an instruction set architecture, ISA, and the nature of a machine-level instruction in terms of its functionality and use of resources (registers and memory).
3. To understand the relationship between instruction set architecture, microarchitecture, and system architecture and their roles in the development of the computer.
4. Be aware of the various classes of instruction: data movement, arithmetic, logical, and flow control.
5. Appreciate the difference between register-to-memory ISAs and load/store ISAs.
6. Appreciate how conditional operations are implemented at the machine level.
7. Understand the way in which subroutines are called and returns made.
8. Appreciate how a lack of resources in ISPs has an impact on high-level languages and the design of compilers.
9. Understand how, at the assembly language level, how parameters are passed to subroutines and how local workplace is created and accessed.

Topic: Interfacing and I/O Strategies

• I/O fundamentals: handshaking and buffering
• Interrupt mechanisms: vectored and prioritized, interrupt acknowledgment
• Buses: protocols, arbitration, direct-memory access (DMA)
• Examples of modern buses: e.g., PCIe, USB, Hypertransport

Learning Objectives:

1. Appreciate the need of open- and closed-loop communications and the use of buffers to control dataflow.
2. Explain how interrupts are used to implement I/O control and data transfers.
3. Identify various types of buses in a computer system and understand how devices compete for a bus and are granted access to the bus.
4. Be aware of the progress in bus technology and understand the features and performance of a range of modern buses (both serial and parallel).

Topic: Memory Architecture

• Storage systems and their technology (semiconductor, magnetic)
• Storage standards (CD-ROM, DVD)
• Memory hierarchy, latency and throughput
• Cache memories - operating principles, replacement policies, multilevel cache, cache coherency

Learning Objectives:

1. Identify the memory technologies found in a computer and be aware of the way in which memory technology is changing.
2. Appreciate the need for storage standards for complex data storage mechanisms such as DVD.
3. Understand why a memory hierarchy is necessary to reduce the effective memory latency.
4. Appreciate that most data on the memory bus is cache refill traffic
5. Describe the various ways of organizing cache memory and appreciate the cost-performance tradeoffs for each arrangement.
6. Appreciate the need for cache coherency in multiprocessor systems

Topic: Functional Organization

• Review of register transfer language to describe internal operations in a computer
• Microarchitectures - hardwired and microprogrammed realizations
• Instruction pipelining and instruction-level parallelism (ILP)
• Overview of superscalar architectures
• Processor and system performance
• Performance – their meeasures and their limitations
• The significance of power dissipation and its effects on computing structures

Learning Objectives:

1. Review of the use of register transfer language to describe internal operations in a computer
2. Understand how a CPU’s control unit interprets a machine-level instruction – either directly or as a microprogram.
3. Appreciate how processor performance can be improved by overlapping the execution of instruction by pipelining.
4. Understand the difference between processor performance and system performance (i.e., the effects of memory systems, buses and software on overall performance).
5. Appreciate how superscalar architectures use multiple arithmetic units to execute more than one instruction per clock cycle.
6. Understand how computer performance is measured by measurements such as MIPS or SPECmarks and the limitations of such measurements.
7. Appreciate the relationship between power dissipation and computer performance and the need to minimize power consumption in mobile applications.

Topic: Multiprocessing

• Amdahl’s law
• Short vector processing (multimedia operations)
• Multicore and multithreaded processors
• Flynn’s taxonomy: Multiprocessor structures and architectures
• Programming multiprocessor systems
• GPU and special-purpose graphics processors
• Introduction to reconfigurable logic and special-purpose processors

Learning Objectives:

1. Discuss the concept of parallel processing and the relationship between parallelism and performance.
2. Appreciate that multimedia values (e.g., 8-/16-bit audio and visual data) can be operated on in parallel in 64-bit registers to enhance performance.
3. Understand how performance can be increased by incorporating multiple
Topic revision: r3 - 2013-10-22 - RobertKasper

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